Addressonsemi ’s UK Bracknell ISG PI Physical Design team is seeking a dynamic and highly motivated Physical Design engineer who will participate in the design of a state-of-the-art Intelligent Sensors ASIC in CMOS/BCMOS/BCD technologies for the Industrial and Automotive markets. The candidate will execute the part or all of the Physical Design process through the entire RTL-to-GDSII flow including hierarchical floor planning, place & route, timing closure, power integrity, static timing verification, physical verification and equivalence checks, in close collaboration with the mixed-signal and digital Design Engineers.
Responsibilities might involve some or all of the following:
- Responsible for the physical implementation from RTL to GDSII of a complex ASICs in advanced CMOS, BCMOS, BCD and/or SiC processes below 65nm technologies
- Work closely with the RTL design team to understand the digital architecture and execute the Physical Design implementation
- Participate to the definition and development of the physical implementation flow
- Manage the floorplan, IO planning, Power planning, the Macros placement and the Chip Level assembly
- Participate in the definition of the power supply strategy and the design planning
- Elaborate timing budget and write power intent (SDC) based on the design information and specification requirement and achieve the timing closure
- Perform the Physical Verification and Checks: DRC, LVS, LEC, Power aware, EM, IR
- Perform the signoff timing analysis and power analysis (IR drop, Electromigration checks, power consumption analysis)
- Integrate DFT/DFY/DFM
- Participate to the evaluation of the fabricated ASIC in our measurement lab when needed
- Participate to design reviews and write documentation and specification as needed
onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
More details about our company benefits can be found here:
https://www.onsemi.com/careers/career-benefits
We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.
- You must have a MSc or PhD in Electrical Engineering or equivalent and 8+ years of hands-on experience in Physical Design of digital IC from RTL to GDSII
- You have a good knowledge of scripting languages (TCL, Python, Bash, Make, Skill)
- A previous and successful experience with Cadence or Synopsys ICC2 Physical Design flows is mandatory
- Experience with the full RTL to GDS2 Physical Design flow execution (Synthesis, P&R, STA, DFT insertion, DRC and LVS sign-off) with 22nm and below technologies is mandatory.
- An Experience with large Mixed-Signal ASICs with high clock speed (+1Ghz) in CMOS/BCMOS/BCD processes and below 65nm technologies is a plus
- A previous experience in physical implementation of digital processing functions with Mixed-Signal ASICs
- You demonstrate good analytical and problem-solving skills
- You are a team player with a critical attitude and sense of initiative
