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VERIFICATION ENGINEERING TRAINEE (F/M/DIV)

Understand the process of developing IPs for the AURIX family and the complex product specifications;. Collaborate with architecture and design teams ;. Use SystemVerilog UVM to create the verification environment and debug test...

CompanyInfineon Technologies
AddressBristol, England
CategoryEngineering
Date Posted 2 months ago See detail

Verification Engineering Trainee (f/m/div)

Infineon Technologies

Bristol, England

Understand the process of developing IPs for the AURIX family and the complex product specifications;. Collaborate with architecture and design teams ;. Use SystemVerilog UVM to create the verification environment and debug test...