- The client is a pioneer of SoC FPGA's, designing their own chips orientated to aerospace & defence markets.
- The client is looking to continue building their SW and HW teams.
- Seeking a Senior Digital Design Engineer to join the Digital Design R&D team, located in Paris.
Role;
- · Act as senior team member and being the referent for Digital Design various topics for junior team members.
- · SoC / IP architecture and design definition in close collaboration with SoC HW/SW Architects and other team leaders.
- · Participate to the architecture/design/verification/implementation/testability/validation reviews for the SoC or IP.
- · Participate to the verification test plans in close collaboration with the Verification team.
- · Participate to the Design For Test (DFT) definition in close collaboration with DFT team.
- · Coding RTL and doing the handoff flow or support junior engineer in the whole design phase.
- · Participate to the validation phase in close collaboration with validation team in the area of expertise.
- · Participate to the continuous improvement of digital flows and methodologies in close collaboration with other team leaders.
- · Work in close collaboration with Backend engineers to ensure physical implementation constraints are considered from the architecture/specification phase.
Qualifications;
- · Master degree or PhD with major in microelectronics/electronics/embedded systems.
- · At least 10 years of industry experience with solid knowledge base in digital electronic, and in the complete SoC development phases from architecture to GDSII.
- · Knowledge of modern SoC architecture including various CPUs, interconnects, PCIe, DDR4/5, multiple digital Ips and peripherals, knowledge of analog Ips is a plus.
- · Knowledge of SoC power, clocking and reset architecture.
- · Tapeout experience is mandatory in multiple technology nodes (28nm to 3nm).
- · Knowledge of scripting languages (Python, Perl, Bash, etc.)